Peripheral hardware devices are often connected to a system-on-a-chip (SoC) through a PCIe (Peripheral Component Interconnect Express) interconnect. Together, the SoC and the peripheral hardware devices form a computer. This is the case for computers running operating systems (OS) configured to run on x86 processors. PCIe links allow the connected peripheral hardware devices to communicate with the host, specifically to read and write data. Traditionally, x86 based systems have been designed to enforce PCIe ordering rules in an end-to-end fashion from the device to the x86 processor and vice versa. The enforcement of PCIe ordering rules allows correct operation of producer/consumer communication models popular in a modern OS.
The producer-consumer communication model allows both the processor and IO (Input/Output) devices to assume the role of producer or consumer. In the example of a user wishing to display a photograph saved on a hard disk to the monitor, the producer, in this case the hard disk, first writes the data making up the photograph to the host system memory under the control of a software driver. In a PCIe compliant system, the hard disk then must notify the processor using IOAPIC interrupts that the data is available. The consumer, in this case the processor, will then read the data in the photograph from memory and display it on the monitor.
In recent years, particularly in smartphones and other portable computing devices, controllers for IO devices based on ARM® AMBA® (Advanced Microcontroller Bus Architecture) architecture have proliferated. Many of these AMBA® based controllers, however, only understand the AMBA® bus protocol. As such, they are not compatible with PCIe based host systems because they do not support the type of ordering rules required for correctly handling IOAPIC (Input/Output Advanced Programmable Interrupt Controller) style interrupts. Due to this incompatibility, AMBA® based peripheral IO devices cannot directly interact with PCIe based host systems.